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http://hdl.handle.net/123456789/21220
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| Title: | Design and implementation of fail -recover operation for embedded system based FPGA |
| Authors: | M. Sabri, Salim
R. Badlishah, Ahmad, Prof. Madya Dr.
M. F., Melka |
| E-mail: | muhsabri1967@yahoo.com |
| Keywords: | Field programmable gate array (FPGA)
Fail-Recover Operation unit (FROU )
Embedded system |
| Issue Date: | 16-Oct-2010 |
| Publisher: | Universiti Malaysia Perlis (UniMAP) |
| Department: | Centre for Graduate Studies |
| Series/Report no.: | Proceedings of the International Postgraduate Conference on Engineering (IPCE 2010) |
| Abstract: | High speed digital systems are often applied in critical
tasks or in environments where a failure can result in
unacceptable malfunctions or in dangerous situations
for people. This proposal presented Fail-Recover
Operation unit (FROU ) design which it overcomes all
the drawbacks of watchdog and fault-tolerant using an
on-the-fly acquisition technique for capturing relevant
system information, without adding any overhead and
being completely transparent to the controlled system.
The development of the system software and hardware
will be totally separated from the presence of the WDP,
thus dramatically simplifying the design process. All
these features are easily obtained with a field
programmable gate array (FPGA) implementation of
the Fail Operation Recovery, so enabling a fast and
straightforward design flow, reduced circuital
complexity, ability to modification the design and a
gain of several additional advantages. |
| Description: | International Postgraduate Conference On Engineering (IPCE 2010), 16th - 17th October 2010 organized by Centre for Graduate Studies, Universiti Malaysia Perlis (UniMAP) at School of Mechatronic Engineering, Pauh Putra Campus, Arau, Perlis, Malaysia. |
| URI: | http://hdl.handle.net/123456789/21220 |
| ISBN: | 978-967-5760-03-7 |
| Appears in Collections: | R. Badlishah Ahmad, Prof. Dr.
Conference Papers
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