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Please use this identifier to cite or link to this item: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/13641

Title: Development of low noise, variable high gain amplifier for signal conditioning circuit
Authors: Tan, Chee Leong
Pukhraj, Vaya, Dr.
???metadata.dc.contributor.url???: vaya@ums.edu.my
Keywords: Amplifier;Common Mode Rejection Ratio (CMRR);High gain;Signal conditioning circuit
Issue Date: Jun-2006
Publisher: The Institution of Engineers, Malaysia
Citation: The Journal of the Institution of Engineers, Malaysia, vol. 67(2), 2006, pages 61-64
Abstract: This paper presents the design of low noise, variable high gain amplifier for signal conditioning circuit. A cascaded amplifier is used to improve the gain. A variable resistor is used to adjust the Common Mode Rejection Ratio (CMRR). The proposed amplifier is built on PCB board. Simulation and experimental results are discussed and compared. The new instrumentation amplifier has the features like gain up to 10000.0 gain, high linearity, and 106dB CMRR. It also has a low slew rate (0.07 V/ μs) and wide gain bandwidth product (0.324 X108Hz).
Description: Link to publisher's homepage at http://www.myiem.org.my/
URI: http://myiem.org.my/content/iem_journal_2006-177.aspx
http://hdl.handle.net/123456789/13641
ISSN: 0126-513X
Appears in Collections:IEM Journal

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