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Please use this identifier to cite or link to this item: http://dspace.unimap.edu.my:80/xmlui/handle/123456789/1353

Title: FPGA Implementation of Cash Money Register
Authors: Mohd Shafari Mohamad Dadiri
???metadata.dc.contributor.advisor???: Norhawati Ahmad (Advisor)
Keywords: Cash money register;Field programmable gate arrays;VHDL (Computer hardware description language);FPGA board;C (Computer program language);Very High-Speed Integrated Circuits (VHSIC)
Issue Date: Mar-2007
Publisher: Universiti Malaysia Perlis
???metadata.dc.publisher.department???: School of Microelectronic Engineering
Abstract: Cash money register will record all the sales and help the traders to see with more clearly about their sale. Most sales that have been made will be finish by pressing key “enter” at the keyboard. At the same time, a drawer will come out and this sale will be record in memory. This documentation will cover briefly about cash money register using VHDL source code and will be implementing it in FPGA Board. Also activities during this project run. Besides theories and application, there are also reports and reviews on daily activities given.
Description: Access is limited to UniMAP community.
URI: http://hdl.handle.net/123456789/1353
Appears in Collections:School of Microelectronic Engineering (FYP)

Files in This Item:

File Description SizeFormat
Abstract, Acknowledgment.pdf26.1 kBAdobe PDFView/Open
Conclusion.pdf10.69 kBAdobe PDFView/Open
Introduction.pdf23.94 kBAdobe PDFView/Open
Literature review.pdf416.84 kBAdobe PDFView/Open
Methodology.pdf64.47 kBAdobe PDFView/Open
References and appendix.pdf26.27 kBAdobe PDFView/Open
Results and discussion.pdf42.7 kBAdobe PDFView/Open
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