Now showing items 1-1 of 1

    • Taguchi Method for p-MOS threshold voltage optimization with a gate length of 22nm 

      Izwanizam, Yahaya; F. Salehuddin; K. E. Kaharudin; A. H. Afifah Maheran (Universiti Malaysia Perlis (UniMAP), 2023-01)
      This paper describes the virtual design of a 22nm gate length p-type metal oxide semiconductor, PMOS. Silvaco, TCAD tools were used to fabricate the device design and to characterize the device’s electrical properties. ...